1. Field of the Invention
The present invention relates to a current mode line driver, and more particularly, to a current mode line driver adapting to a variable loading.
2. Description of the Prior Art
In general, a current communication system enhances signal intensity via a line driver to increase transmitting quality before sending into a transmission line, wherein the line driver can be a voltage mode line driver or a current mode line driver. Since the power line impedance in a power line communication system (PLC) varies from several ohms to ten thousands of ohms, i.e. having a variable loading, the current power line system often applies the voltage mode line driver which can generate stable output voltage swing.
For example, please refer to FIG. 1A, which is a schematic diagram of a conventional power line system 10. The power line system 10 comprises a digital-analog converter (DAC) 102, a filter 104 and a line driver 106. After the DAC 102 converts a digital signal to an analog signal, the analog signal is filtered by transmission filter 104, and then sent to the line driver 106. The line driver 106 outputs inverse differential signals to a power line via a positive output terminal OUTP and a negative output terminal OUTN, e.g. center 3.5V outputting inverse differential signals with a center of 3.5V and an output voltage swing of 7V when operating between 0V to 7V.
In such a condition, please refer to FIG. 1B and FIG. 1C, which are schematic diagrams of voltage mode line drivers 108 and 110 for realizing the line driver 106 in FIG. 1A, respectively. As shown in FIG. 1B and FIG. 1C, the voltage mode line driver 108 and 110 mainly comprise operational amplifiers (OP) and a feedback circuit. Therefore, the voltage mode line driver 108 and 110 can generate stable output voltage swings on the power line with the variable loading via the formed closed loop structure, thus having better linearity.
However, since the frequency range of a power line system increases, i.e. up to 100 MHz analog bandwidth, the OPs of the voltage mode line driver 108 and 110 reach their unit gain bandwidth during high frequency transmission, i.e. the OPs have no gain during high frequency transmission. In such a condition, it needs to increases quiescent currents to maintain feedback stability for avoiding oscillating, thus causing higher power consumption to maintain linearity.
On the other hand, please refer to FIG. 1D, which is a schematic diagram of a current mode line driver 112 for realizing the line driver 106 in FIG. 1A. As shown in FIG. 1D, the current mode line driver 112 is an open loop structure and thus has faster output speed, so as to perform high frequency transmission with a lower quiescent current and thus have lower power consumption. However, since the current mode line driver 112 generates the differential signals by utilizing the analog signal to control a pair of current cells to output current to the power line with the variable loading. Therefore, the output voltage swing of the current mode line driver 112 has severe variations due to loading variations, which may be out of the ideal operating range. Besides, the current mode line driver 112 is an open loop structure, having worse linearity.
Thus, there is a need to provide a line driver adapting to a power line system during high frequency transmission.